[FINANCIAL] Semiconductor IP ·
RISC-V · AI Data Center / Pre-IPO —
April 9, 2026 — Series G COMPLETED
SiFive Raises $400M at $3.65B — NVIDIA and
Apollo Back the RISC-V Chip IP Pioneer in Its Final Round Before IPO
An oversubscribed Series G for the company that invented RISC-V:
Santa Clara-based SiFive closes $400 million at a $3.65 billion valuation led
by Atreides Management with NVIDIA, Apollo Global Management, and T. Rowe Price
— positioning the open-standard CPU IP licensing company as the alternative
architecture of choice for hyperscalers seeking freedom from ARM and Intel, as
agentic AI drives surging demand for customizable, energy-efficient data center
processors.
DEAL SNAPSHOT
|
ROUND AMOUNT $400 Million — Series G
(oversubscribed) |
COMPLETED April 9, 2026 |
|
POST-MONEY VALUATION $3.65 Billion |
CORES SHIPPED TO DATE >10 Billion RISC-V
cores across 500+ chip designs |
|
LEAD INVESTOR Atreides Management
(Gavin Baker, Managing Partner & CIO) |
IPO INTENTION CEO states this is the
final private round before IPO |
THE PARTIES
|
LEAD INVESTOR Atreides Management +
NVIDIA + Apollo Global Management + More Atreides
Management (Boston): growth equity firm led by Gavin Baker (formerly Fidelity
OTC Portfolio manager, one of the most successful tech fund managers of his
generation). Led the oversubscribed Series G. New investors: NVIDIA
(strategic — also partnering on NVLink Fusion integration and CUDA porting to
RISC-V); Apollo Global Management ($600B+ AUM alternative asset giant); D1
Capital Partners; Point72 Turion; T. Rowe Price Investment Management.
Existing investors reinvesting: Prosperity7 Ventures (Saudi Aramco venture
arm); Capital Group; Sutter Hill Ventures. Gavin Baker: "RISC-V is
breaking the paradigm of proprietary ISAs — unleashing the full potential of
open standards exactly when the industry needs it most." |
COMPANY / RECIPIENT SiFive, Inc. Santa Clara,
CA-based RISC-V processor IP company. Chairman and CEO Patrick Little.
Founded 2015 by Andrew Waterman, Krste Asanovic, and Yunsup Lee — the
Berkeley researchers who created the RISC-V instruction set architecture.
SiFive licenses customizable RISC-V CPU and AI accelerator IP to
semiconductor companies and hyperscalers, who incorporate it into custom
chips without per-unit royalties. Portfolio: 10B+ cores shipped to date; IP
in 500+ chip designs; major hyperscaler collaborations for data center CPU
development. Key milestones: NVIDIA committed to porting CUDA to
SiFive/RISC-V; Red Hat Enterprise Linux 10 ported to RISC-V; Ubuntu optimized
for SiFive. NVLink Fusion integration announced January 2026 — enabling
RISC-V CPUs to connect directly to NVIDIA GPUs. |
DEAL OVERVIEW
SiFive closed its
oversubscribed Series G on April 9, 2026, raising $400 million at a $3.65
billion valuation. CEO Patrick Little described the round as the company's
final private funding round before an initial public offering, though no
specific IPO timeline was announced. The round was led by Atreides Management
with participation from NVIDIA, Apollo Global Management, D1 Capital Partners,
Point72 Turion, T. Rowe Price Investment Management, and existing backers. The
capital will be deployed across two priorities: (1) accelerated development of
high-performance RISC-V CPU and AI IP solutions specifically designed for data
center workloads; (2) global engineering team expansion to support hyperscaler
customer implementations.
NVIDIA's
investment is both financial and strategic: in January 2026, SiFive announced
the integration of NVIDIA NVLink Fusion into its data center platform —
enabling RISC-V-based CPUs to connect directly to NVIDIA GPUs via a coherent,
high-bandwidth, low-latency interconnect. This positions SiFive's CPU IP as a
complementary layer in NVIDIA's AI infrastructure ecosystem, allowing
hyperscalers to build semi-custom AI compute systems combining open-standard
RISC-V CPUs with NVIDIA's proprietary GPU accelerators.
"Hyperscale customers have made it very clear that it is time to
accelerate the availability of open standard alternatives for the data center.
Their consistent ask is for customizable CPU solutions in IP form that will
enable them to meaningfully differentiate their data center compute
solutions."
— Patrick
Little, Chairman & CEO, SiFive
THE RISC-V DATA CENTER OPPORTUNITY
RISC-V is an
open-source instruction set architecture (ISA) — the fundamental specification
governing how a processor interprets and executes software instructions. Unlike
ARM (proprietary, licensed by SoftBank's ARM Holdings at royalty rates that
increase with chip value) and x86 (controlled by Intel and AMD), RISC-V is free
to implement and extend without per-unit royalties. The hyperscale computing
industry — which collectively designs tens of billions of dollars of custom
silicon annually at Google (TPU), Amazon (Trainium/Inferentia), Microsoft
(Maia), and Meta — has historically relied on ARM for CPU cores. SiFive offers
a compelling alternative: fully customizable RISC-V CPU IP that allows
hyperscalers to differentiate their chips more deeply than ARM's licensing
model permits, without Intel's x86 legacy complexity.
INVESTORS
Lead
(Series G): Atreides Management
(Gavin Baker, Managing Partner & CIO)
New
Investors: NVIDIA + Apollo Global
Management + D1 Capital Partners + Point72 Turion + T. Rowe Price Investment
Management
Existing
Investors: Prosperity7 Ventures
(Saudi Aramco) + Capital Group + Sutter Hill Ventures